Network-on-Chip Design for High Performance Demanding Multimedia Application

نویسندگان

  • Naveen Choudhary
  • M. S. Gaur
  • V. Laxmi
چکیده

Systems-on-Chip architecture integrates several heterogeneous components on a single chip. A key challenge is to design the communication between the different entities of a SoC in order to minimize the communication overhead. Network-on-chip (NoC) is a new approach for communication infrastructure of Systems-on-Chip (SoC) design, which provides network based solution for on-chip communication. Networks on Chip can be designed in different ways, according to the network architecture and protocol choice. It is important to balance the communication needs across the different links to avoid congestion and hot spots especially for

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Application Mapping onto Network-on-Chip using Bypass Channel

Increasing the number of cores integrated on a chip and the problems of system on chips caused to emerge networks on chips. NoCs have features such as scalability and high performance. NoCs architecture provides communication infrastructure and in this way, the blocks were produced that their communication with each other made NoC. Due to increasing number of cores, the placement of the cores i...

متن کامل

Design of a Low-Latency Router Based on Virtual Output Queuing and Bypass Channels for Wireless Network-on-Chip

Wireless network-on-chip (WiNoC) is considered as a novel approach for designing future multi-core systems. In WiNoCs, wireless routers (WRs) utilize high-bandwidth wireless links to reduce the transmission delay between the long distance nodes. When the network traffic loads increase, a large number of packets will be sent into the wired and wireless links and can...

متن کامل

Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)

Nowadays, faults and failures are increasing especially in complex systems such as Network-on-Chip (NoC) based Systems-on-a-Chip due to the increasing susceptibility and decreasing feature sizes. On the other hand, fault-tolerant routing algorithms have an evident effect on tolerating permanent faults and improving the reliability of a Network-on-Chip based system. This paper presents reliabili...

متن کامل

A quantitative evaluation of a Network on Chip design flow for multi-core consumer multimedia applications

A growing number of applications are integrated on the same System on Chip in the form of hardware and software Intellectual Property (IP). Many applications have firm or soft real-time requirements and require bounds on latency and throughput. To accommodate the growing number of application requirements, the on-chip interconnect must offer scalability on the physical, architectural and functi...

متن کامل

Non-Blocking Routers Design Based on West First Routing Algorithm & MZI Switches for Photonic NoC

For the first time, the 4- and 5-port optical routers are designed by using the West First routing algorithm for use in optical network on chip. The use of the WF algorithm has made the designed routers to provide non-blocking routing in photonic network on chip. These routers not only are based on high speed Mach-Zehnder switches(Which have a higher bandwidth and more thermal tolerance than mi...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2011